Advanced Ceramics

PCB Space Improvements

May 1, 2011
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Figure 1. The evolution of low-inductance decoupling capacitors.

Electronic designers continuously battle printed circuit board (PCB) space restrictions as a result of advanced system requirements to feature increased computing power, speed and functionality. After all, new products are not expected to get larger and heavier than their introductory sizes.

Designers can save board space while improving electrical performance and reliability with the use of advanced integrated thick-film passive components, including decoupling capacitors, capacitor arrays, integrated LC T filter arrays, and low-inductance capacitor arrays. All of these components have been developed because of advancements in manufacturing processes that enable passive component manufacturers to accurately control electrode dimensions and effectively terminate those electrodes in a cost-effective way.

Figure 2. ESL in a mounted MLCC directly relates to the area of an idealized current loop (LH x LW) formed in the board and capacitor.

Technology Innovations

One of the best methods of illustrating the termination progress of ceramic and thin-film components is to look at the evolution of decoupling capacitors (see Figure 1). Decoupling capacitors have evolved from multilayer ceramic capacitors (MLCCs) to reverse geometry, low-inductance chip capacitors (LICCs); multi-terminal inter-digital capacitors (IDCs); low-inductance capacitor arrays (LICAs); and, most recently, bottom-terminated land-grid arrays (LGAs). This evolution has been driven by the end-user requirements of lower inductance power delivery systems to keep pace with switching speeds and transistor density in silicon processors.

Electrically, these capacitors help reduce noise to such an extent that a lesser number of capacitors needs to be used. PCB space is freed up, and the reduction in the number of capacitors needed for decoupling thereby saves board space and weight while the reduced components and solder connections improve system reliability. Since the number of components is reduced, fewer solder joints can potentially go bad and fewer individual components need to be factored into system failure predictions.

Figure 3. Reverse-geometry LICCs have lower ESL than MLCCs because of a smaller current loop area and greater span length.

Reducing Capacitor Inductance

Capacitor inductance is a result of the interaction of magnetic flux fields created by the electric current flow in and out of the device on a circuit board. The current path or "loop" includes not only the multilayer capacitor's internal electrodes and external termination, but also the power planes, vias, mounting pads, and solder fillets of the substrate/package (see Figure 2).

In a simple analysis, two basic strategies can be used to reduce the equivalent series inductance (ESL) of a capacitor:
  • Make the area of the current loop formed by the mounted device as small as possible
  • Employ multiple, parallel loops to reduce the net inductance
These strategies are somewhat related, as current can flow through an idealized conductor loop with a given height and width that defines the loop area; in the third dimension, this loop has a given span that is perpendicular to the direction of current flow. To minimize ESL, loop area is minimized and loop span is maximized. This is the strategy that led to the development of the reverse-geometry LICC, which, when compared to an equal case size MLCC, has an effective current loop with smaller "area" and greater span to give the LICC an inductance reduction of approximately three to four times (see Figure 3).

The second strategy to reduce decoupling capacitor inductance is shown by comparing the reverse geometry LICC with the IDC. As illustrated in Figure 4, the long-side terminations of LICCs can be segmented with terminals of alternating polarity, forming several parallel, small-area current loops in the IDC device. The lumped inductance of an eight-terminal IDC is approximately three times lower than a LICC of equal case size. In IDCs, inductance can be further reduced by increasing the number of parallel terminal contacts on any of the four sides of the device, preferably with decreased pitch. This is an extension of the strategy of more parallel loops with smaller current loop area.

Finally, for a given style of capacitor with a set number of terminals-whether MLCC, LICC or IDC-the inductance can be reduced by choosing a smaller case size part; in other words, the case size is directly related to the current loop area. Therefore, the consequences of the evolution of low-inductance decoupling capacitors from MLCC to IDC, with smaller case sizes, include an increase of the complexity of the terminal configuration and a related (but unwanted) generalized reduction of the maximum available capacitance per device. The challenges in both capacitor fabrication processes and board assembly operations that are brought on by this evolution provide an opportunity for improvement.

Figure 4. Internal electrode schematics show how IDC terminals are segmented in alternating polarity to achieve small parallel current loops and thus lower ESL than LICCs.

Land-Grid Array Capacitor

All of the capacitors discussed previously share some common features:
  • The internal electrodes are oriented horizontally (i.e., parallel to the substrate after mounting)
  • The electrical signals enter/exit the device through terminals located on the side of the capacitor
A new capacitor design changes the configuration of the internal electrodes to feature vertical orientation and permits the I/O terminals to be located on the bottom of the capacitor, so signals feed directly into the circuit board (see Figure 5).

To emphasize the bottom (rather than side) connectivity, this style of device is called a land-grid array capacitor. The LGA capacitor uses the same strategies listed previously for obtaining low inductance, but the internal electrode configuration allows loop areas to be significantly reduced relative to the other designs. Because of the efficiency of the current cancellation within the capacitor that is achieved by the new electrode/terminal structure, a relatively simple two-terminal LGA can have equivalent inductance to a multi-terminal IDC (see Figure 6). Low-inductance LGA capacitors provide simple PCB layout and implementation while offering optimized low-inductance performance.

Figure 5. LGA capacitors have patterned vertical electrodes coupled with precision termination to form very small current loops and very low ESL.

Low-Inductance Capacitor Array

The low-inductance capacitor array remains the leading choice in decoupling high-performance semiconductor packages. LICAs use a C4 solder ball termination, with either Sn/Pb or Pb-free solder balls. Vertical electrodes, as well as a minimized board loop area, ensure LICA performance in virtually all decoupling applications.

Figure 6. 1 µF 0306 2T-LGAs feature simplified LICC-like terminals.

Complex Electrode Design

Termination evolution has also allowed component manufacturers to integrate complex structures into miniature packages. For instance, low-inductance IDC capacitors can potentially have terminations on all sides of the package. That termination capability allows four LC T configured filters to be packaged into a single ceramic body (see Figure 7).

Figure 7. Low-inductance IDC capacitors can potentially have terminations on all sides of the package.

Feed-Thru Array

A feed-thru array can potentially replace eight ferrite beads and four capacitors with a single device. In addition to improved reliability, board savings of up to 80% can be realized. Feed-thru arrays are essentially a low Q, broadband EMI filter. It is common to have a 30 dB attenuation across a 300 mhz RF spectrum. The RF spectrum can be chosen anywhere between 75-1500 mhz.

A feed-thru array could not exist without the advanced termination metallization control gained through the development of advanced decoupling capacitors. A common frequency response for the most common LC T filter arrays is shown in Figure 8.

Figure 8. Frequency response for common LC T filter arrays.

Material Advances

Traditional configuration capacitor arrays have benefited from material advances as well. Capacitor arrays now have an optional termination that uses a sub-layer of conductive epoxy, which is then finished with traditional metals. This termination greatly enhances the components' ability to withstand board flexure and temperature cycling.

The most common use for FLEXITERM(tm) capacitor arrays is to ensure that the MLCCs used on the signal and Vcc/Vbat input of automotive and avionic modules will not crack during process, connector assembly or severe exposure to use environments. Design concerns about performance are paramount, as a failed or cracked MLCC could potentially lead to the catastrophic failure of the module, system, and/or use platform.

The impact of the conductive polymer sub-layer termination materials on MLCC performance in high flexure and temperature cycle environments cannot be stressed enough. The industry standard for flexure is a minimum of 2 mm. Using FLEXITERM, manufacturers can provide up to 5 mm of flexure without internal cracks. FLEXITERM also provides increased temperature cycling performance (3000 cycles and beyond).

Capacitor Evolution

Low-inductance capacitors have evolved primarily due to new termination processes recently implemented in capacitor manufacturing. These new processes allow the capacitor terminals to be focused on current cancellation loop areas and spans in the decoupling capacitor. Board layout must be optimized (low-inductance layout rules) to allow for the low-inductance capacitor properties to remain after board attachment.

Low-inductance capacitors are used in an ever-expanding number of high-speed applications. Their ability to lower ground plane impedance has the potential to reduce radiated emissions. In addition, low-inductance capacitors can help reduce component count, system weight and layout complexity while improving system reliability.

For more information, contact AVX Corp. at One AVX Blvd., Fountain Inn, SC 29644; call (864) 967-9343; or visit


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