This paper received the Outstanding Technical Paper Award at the 2008 CARTS Europe Conference.

Figure 1. Multi-anode construction.
Abstract
Traditional
tantalum capacitors are known for their excellent reliability, robustness and
stable parameters. This is why conventional tantalum capacitors with counter
MnO
2 electrodes are still a popular choice for long-life
and high-reliability applications. However, one of the downsides of the MnO
2
electrode system is its higher equivalent series resistance (ESR) when compared
with polymer tantalum capacitors. The multi-anode concept (i.e., the use of
several node elements within one capacitor body) significantly reduces ESR and
is an ideal choice for most demanding applications, such as servers and
high-power telecommunication boards. This paper describes a novel multi-anode
configuration that has been developed to lower the height of the components and
reduce the ESL and manufacturing costs. This approach will be compared to
standard single-anode designs.
Introduction
One
common trend in switch-mode power supplies, micro-processors and digital
circuit applications is the reduction of noise while operating at higher
frequencies. In order to make this possible, components with low ESR, high
capacitance and high reliability are required. One way to significantly reduce
the ESR of tantalum capacitors is to use a multi-anode approach in which more
anode elements are used within one capacitor body (see Figure
1).
1-6
MnO
2 technology provides excellent field performance,
environmental stability, and high electrical and thermal stress resistance over
a wide voltage range (from 2.5 to 50 volts). Devices are designed for operation
in temperatures of up to 125°C. The overall surface area of a tantalum
capacitor anode, particularly its surface-to-volume ratio, is one of the key
parameters that define its ESR value; the higher the overall surface area, the
lower the ESR.

Figure
2. Anode design in cross-section: (a) single, (b) fluted anode and (c)
multi-anode.
Single
anode (see Figure 2a) is the standard general-purpose design due to its excellent cost vs. performance ratio. Though the multi-anode design
(see Figure 2c) offers the lowest possible ESR, the downside to this approach
is a higher manufacturing cost compared to a single-anode solution. The fluted
anode design (see Figure 2b), using standard chip assembly processes, is a
compromise between low ESR and low cost. The flute design is used in
price-sensitive, low-ESR designs, while the multi-anode concept has been used
in applications where low ESR and high reliability are required without
compromise, such as telecom infrastructure, networking, servers or military/aerospace
projects.
Aside from the aforementioned differences between single-, multi- and
fluted-anode capacitors, the multi-anode concept has two additional advantages:
- Because the multiple-anode design provides better thermal dissipation
than the single-anode, a multi-anode capacitor can be loaded to a higher
continuous current. For the same reason, multi-anode capacitors are also more
robust against current surges. When compared to the single-anodes of the same
case size, the power dissipation of conventional multi-anode devices is
higher.
- Compared to the single-anode design, the volumetric efficiency (the
active zone) of multi-anode capacitors is lower, which can lead to a
presumption that multi-anodes cannot reach the same capacitance voltage (CV)
factor. In practice, thinner anodes are easier to process and better penetrated
by the second MnO2 electrode system, which
enables the use of higher CV tantalum powders and allows multi-anode capacitors
to achieve the same or even better CV levels.

Figure
3. Multi-anode concept cross-section: (a) vertical construction and (b)
horizontal construction.
New Multi-Anode Construction
Most
conventional tantalum multi-anodes available on the market today use three to
five anodes inside one body in a vertical configuration, as shown in Figure 3a.
This is practical from a manufacturing point of view but inferior to a
horizontal layout where thinner, flat anodes will reduce the ESR even further
(see Figure 3b). The cost of the multi-anode design grows exponentially with
the number of anodes. The three-anode configuration currently used in most
designs is close to the optimum cost vs. ESR ratio.
The individual anodes in the vertical design configuration are connected by
silver glue epoxy to a second electrode lead frame. The same system is used in
standard single-anode capacitors, hence the manufacturing technology is similar
to the established process and no major investment into new technology flow is
required for the multi-anode design. The horizontal design, on the other hand,
requires a new solution to the problem of connection between the anodes, which
can result in costly modifications of established technology. To date, this
design has therefore not been used for a single-body multi-anode capacitor in
volume production. Horizontal designs are used more often in special
applications by stacking two or more finished capacitors together through
soldering or jigging systems into arrays or modules.

Figure 4. ESR of horizontal and vertical layout.
The
difference in ESR performance between horizontal and vertical configurations is
shown in Figure 4. This example is based on a theoretical calculation for
D-case capacitors. It shows that the two-anode horizontal layout has a similar
ESR to the three-anode system in vertical configuration, though the ESR vs.
cost value is better for the horizontal structure. Limited potential for height
reduction puts the vertical design at a disadvantage to the horizontal
construction due to the fact that capacitors currently measure between 3.5 to
4.5 mm high. Today, this factor is increasing in importance for applications
where the miniaturization of electronics is becoming an issue, even in
applications like telecom infrastructure or military where it has not been so
in the past.

Figure
5. Multi-anode “mirror” horizontal design: (a) cross-section of 2.0 mm height
7343-case and (b) 3-D internal construction.
A
novel multi-anode construction has been developed using two anodes in a
horizontal “mirror” configuration (see Figure 5). The mirror construction uses
a modified lead frame shape where the lead frame is positioned between the two
anodes. This configuration solves the connection issues of the horizontal
anodes and brings the manufacturing modification cost down to an acceptable
level.
The ESR performance of the two-anode mirror design is slightly inferior to the
three vertical anode equivalent, but it is cheaper to make. However, the main
benefit achieved by this new mirror design is that the configuration enables
multi-anode capacitors to be reduced in height down to 3.1 mm for the 7343-31
D-case size and, in the very near future, even 2.0 maximum height for 7343-20
Y-case sizes. The other advantage of the mirror design is its symmetrical layout,
which helps to reduce self inductance (ESL).

Figure 6. Typical ESR of different internal anode design configurations.
Figure
6 compares the ESR performance of a typical 22 µF 35 V capacitor using
different internal design configurations. As described previously, the greater
the surface area, the better the ESR performance. Also, the ESR distribution
range is much tighter in low-ESR designs. Hence, low-ESR parts are recommended
for circuits with a bank of parallel capacitors due to a more equal load share
among the individual capacitors. It should also be noted that there is no
direct comparison in the case of the vertical multi-anode design, as it is
available in the taller E-case size only, as opposed to other designs that are
available in the lower D-case size. Three vertical D-case size anodes in the
vertical multi-anode style would show a higher ESR value compared to the E-case
size (data available for this comparison only).

Figure 7. ESL of D330/4
capacitor in mirror design and single-anode construction.
The other benefit of the
mirror design is its symmetrical internal design, which was mentioned briefly
earlier. Because symmetrical construction helps to compensate part of the inductance
loop (see Figure 7), ESL is lower than in a design that uses a classical lead
frame with a pocket. Table 1 shows typical ESL values for a D-case size mirror
and single-anode capacitor. The catalogue ESL value for a D-case single-anode
design is 2.4 nH (typical values are around 2.1 nH).

Figure 8. Capacitance and ESR
vs. frequency for mirror multi-anode and single-anode D-case 330 µF 4 V
capacitors.
The mirror-design ESL is
about 1 nH, half that of the conventional design. This moves the resonant
frequency of mirror multi-anodes to higher values. Figure 8 shows the resonant
frequency of the mirror design at 500 kHz, while the single anode is 340 kHz.
The capacitance drop with frequency is lower in the case of the mirror
structure due to the thinner anodes that can be used.

Figure
9. Cooling effect of (a) single anode and (b) mirror design.
The
change in resonant frequency of the mirror design due to the lower ESL
significantly improves its working range for today’s favorite DC/DC converter
switching frequency range, 250-500 kHz. Another benefit of the mirror design
lies in its improved power dissipation capability. Heat generated in the anode
by ripple current is cooled through leads and tantalum wire to PCB pads (see
Figure 9).
Thus, while the single-anode D-case capacitor
has the capability to continuously dissipate only 150 mW, a mirror construction
capacitor of the same case size can handle 255 mW. This represents a ripple
current handling capability of 2.7 A; the single-anode design handles only 1.0
A (D 330 µF 10 V 150 mΩ).
Mirror-type horizontal multi-anode capacitors
currently reach capacitance values
in TPM D-case of 220 µF to 1000 µF, with voltages ranging from 2.5 to 10 V and
ESR from 25-35 mΩ. Further developments will extend the voltage range up to 35 and 50 V,
making the new capacitors attractive for telecommunications applications where
design height is becoming a crucial parameter. Capacitance values of 10-22 µF
and ESR performance of 65-140 mΩ on a single 35-50 V capacitor are difficult to attain within the 3.1 mm
maximum height by any other technology.

Table
1. Typical ESL values for a D-case-size mirror and single-anode capacitor.
Summary & Conclusion
A
novel mirror design approach for horizontal multi-anode tantalum capacitors has
been developed. The new construction excels in the following fields:
- Better low-ESR configuration
- Lower-profile D-case 7343-31 (3.1 mm maximum height) with potential
down to Y-case 7343-20 (2.0 mm)
- Reduced manufacturing costs
- Lower ESL (symmetrical design) significantly expands the working
frequency up to 500 kHz (D-case)
- Lower ESL is achieved on the standard footprint without the need for
PCB layout change
- Significantly higher ripple current capability
A patent covering the mirror assembly of solid electrolytic capacitors has been
filed as U.S. Serial No.11/602,451 in the U.S. Patent and Trademark Office.
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